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DAC
2009
ACM
15 years 10 months ago
Multicore parallel min-cost flow algorithm for CAD applications
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and manycore microprocessors have the potential to offer scalable perf...
Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng
DAC
2008
ACM
15 years 10 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
DAC
2008
ACM
15 years 10 months ago
DeFer: deferred decision making enabled fixed-outline floorplanner
In this paper, we present DeFer -- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing fl...
Jackey Z. Yan, Chris Chu
DAC
2004
ACM
15 years 10 months ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr
DAC
2004
ACM
15 years 10 months ago
Automated energy/performance macromodeling of embedded software
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...