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139
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DAC
2003
ACM
15 years 8 months ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson
115
Voted
EUROGP
2003
Springer
101views Optimization» more  EUROGP 2003»
15 years 8 months ago
An Enhanced Framework for Microprocessor Test-Program Generation
Test programs are fragment of code, but, unlike ordinary application programs, they are not intended to solve a problem, nor to calculate a function. Instead, they are supposed to ...
Fulvio Corno, Giovanni Squillero
ICCAD
1998
IEEE
116views Hardware» more  ICCAD 1998»
15 years 7 months ago
On primitive fault test generation in non-scan sequential circuits
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
Ramesh C. Tekumalla, Premachandran R. Menon
158
Voted
MICRO
1992
IEEE
133views Hardware» more  MICRO 1992»
15 years 7 months ago
Code generation schema for modulo scheduled loops
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...
145
Voted
EURODAC
1990
IEEE
92views VHDL» more  EURODAC 1990»
15 years 7 months ago
Accelerated test pattern generation by cone-oriented circuit partitioning
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
Torsten Grüning, Udo Mahlstedt, Wilfried Daeh...