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» Efficiently Supporting Fault-Tolerance in FPGAs
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VEE
2012
ACM
239views Virtualization» more  VEE 2012»
13 years 5 months ago
Facilitating inter-application interactions for OS-level virtualization
OS-level virtualization generates a minimal start-up and run-time overhead on the host OS and thus suits applications that require both good isolation and high efficiency. However...
Zhiyong Shan, Xin Wang 0001, Tzi-cker Chiueh, Xiao...
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
15 years 2 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
FCCM
2009
IEEE
123views VLSI» more  FCCM 2009»
15 years 1 months ago
Scalable High Throughput and Power Efficient IP-Lookup on FPGA
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
Hoang Le, Viktor K. Prasanna
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 4 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
FCCM
2004
IEEE
87views VLSI» more  FCCM 2004»
15 years 1 months ago
A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation
General purpose computing architectures are being called on to work on a more diverse application mix every day. This has been fueled by the need for reduced time to market and ec...
David Wentzlaff, Anant Agarwal