: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
We investigate various problems related to circulant graphs – finding the shortest path between two vertices, finding the shortest loop, and computing the diameter. These probl...
Jin-yi Cai, George Havas, Bernard Mans, Ajay Nerur...
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
Abstract. One of the most important analysis problems of hybrid systems is the reachability problem. State of the art computational tools perform reachability computation for timed...
Gerardo Lafferriere, George J. Pappas, Sergio Yovi...