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» Elements of low power design for integrated systems
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GLVLSI
2008
IEEE
169views VLSI» more  GLVLSI 2008»
14 years 9 months ago
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power ...
Tadayuki Matsumura, Tohru Ishihara, Hiroto Yasuura
ISCAS
2007
IEEE
149views Hardware» more  ISCAS 2007»
15 years 3 months ago
Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition
— Many application-specific wireless sensor network (WSN) systems require small size and low power features due to their limited resources, and their use in distributed, wireles...
Chung-Ching Shen, Roni Kupershtok, Bo Yang, Felice...
MOBISYS
2005
ACM
15 years 9 months ago
Turducken: hierarchical power management for mobile devices
Abstract-Maintaining optimal consistency in a distributed system requires that nodes be always-on to synchronize information. Unfortunately, mobile devices such as laptops do not h...
Jacob Sorber, Nilanjan Banerjee, Mark D. Corner, S...
80
Voted
TVLSI
2010
14 years 4 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
86
Voted
AUTOID
2005
IEEE
15 years 3 months ago
An Ultra-Low Power, Optically-Interrogated Smart Tagging and Identification System
We present a wireless identification system that employs an optical communications link between an array of uniquely identifiable smart tags and an interrogator flashlight. As the...
Gerardo Barroeta Perez, Mateusz Malinowski, Joseph...