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» Elements of low power design for integrated systems
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DAC
2002
ACM
15 years 10 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
ICRA
2005
IEEE
128views Robotics» more  ICRA 2005»
15 years 3 months ago
Carbon Fiber Components with Integrated Wiring for Millirobot Prototyping
- We are developing a process to quickly prototype millirobotic systems in which the approach is to identify and develop a construction kit for fabricating almost any design, simil...
Ranjana Sahai, Erik Steltz, Ronald S. Fearing
DAC
2008
ACM
15 years 10 months ago
Low power passive equalizer optimization using tritonic step response
A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts ...
Ling Zhang, Wenjian Yu, Haikun Zhu, Alina Deutsch,...
CODES
2008
IEEE
15 years 4 months ago
System-level mitigation of WID leakage power variability using body-bias islands
Adaptive Body Biasing (ABB) is a popularly used technique to mitigate the increasing impact of manufacturing process variations on leakage power dissipation. The efficacy of the ...
Siddharth Garg, Diana Marculescu
TMC
2010
112views more  TMC 2010»
14 years 7 months ago
Comparison of Data-Driven Link Estimation Methods in Low-Power Wireless Networks
Abstract—Link estimation is a basic element of routing in lowpower wireless networks, and data-driven link estimation using unicast MAC feedback has been shown to outperform broa...
Hongwei Zhang, Lifeng Sang, Anish Arora