Sciweavers

1379 search results - page 39 / 276
» Elements of low power design for integrated systems
Sort
View
ISCAS
2006
IEEE
118views Hardware» more  ISCAS 2006»
15 years 8 months ago
An ultra-low power silicon-on-sapphire ADC for energy-scavenging sensors
We designed and fabricated an 8-bit analog-to- LiSTOF ENERGY-SCAVENGER PERFORMANCE digital converter (ADC) in a 0.5,um Silicon-on-Sapphire CMOS technology. The ultra-low power and ...
Zhengming Fu, Eugenio Culurciello
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
15 years 7 months ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 5 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
LCTRTS
2007
Springer
15 years 8 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
DAC
1997
ACM
15 years 6 months ago
InfoPad - An Experiment in System Level Design and Integration
The InfoPad project was started at UC Berkeley in 1992 to investigate the issues involved in providing multimedia information access using a portable, wireless terminal. It quickl...
Robert W. Brodersen