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» Elements of low power design for integrated systems
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ASPDAC
2006
ACM
93views Hardware» more  ASPDAC 2006»
15 years 8 months ago
Electrothermal analysis and optimization techniques for nanoscale integrated circuits
Abstract— With technology scaling, on-chip power densities are growing steadily, leading to the point where temperature has become an important consideration in the design of ele...
Yong Zhan, Brent Goplen, Sachin S. Sapatnekar
ISLPED
2010
ACM
193views Hardware» more  ISLPED 2010»
15 years 2 months ago
PASAP: power aware structured ASIC placement
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Ashutosh Chakraborty, David Z. Pan
DATE
2010
IEEE
131views Hardware» more  DATE 2010»
15 years 7 months ago
Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits
Abstract—This article discusses system-level techniques to optimize the power-performance trade-off in subthreshold circuits and presents a uniform platform for implementing ultr...
Armin Tajalli, Yusuf Leblebici
ISLPED
2005
ACM
147views Hardware» more  ISLPED 2005»
15 years 7 months ago
System level power and performance modeling of GALS point-to-point communication interfaces
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Koushik Niyogi, Diana Marculescu
DATE
2008
IEEE
144views Hardware» more  DATE 2008»
15 years 8 months ago
Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces
The prospective use of upcoming nanometer CMOS technology nodes (65nm, 45nm, and beyond) in bioelectronic interfaces is raising a number of important issues concerning circuit arc...
Carlotta Guiducci, Alexandre Schmid, Frank K. G&uu...