Abstract— With technology scaling, on-chip power densities are growing steadily, leading to the point where temperature has become an important consideration in the design of ele...
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Abstract—This article discusses system-level techniques to optimize the power-performance trade-off in subthreshold circuits and presents a uniform platform for implementing ultr...
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
The prospective use of upcoming nanometer CMOS technology nodes (65nm, 45nm, and beyond) in bioelectronic interfaces is raising a number of important issues concerning circuit arc...
Carlotta Guiducci, Alexandre Schmid, Frank K. G&uu...