1379 search results - page 56 / 276 » Elements of low power design for integrated systems |
132
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ICCD
2006
IEEE
15 years 11 months ago
2006
IEEE
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
125
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ISCA
2010
IEEE
15 years 7 months ago
2010
IEEE
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
127
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ASAP
2009
IEEE
14 years 11 months ago
2009
IEEE
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
131
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AVSS
2008
IEEE
15 years 2 months ago
2008
IEEE
Moving object classification in far-field video is a key component of smart surveillance systems. In this paper, we propose a reliable system for person-vehicle classification whi...
116
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DAC
2005
ACM
15 years 3 months ago
2005
ACM
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...