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» Elements of low power design for integrated systems
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GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
15 years 2 months ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili
FPL
2004
Springer
98views Hardware» more  FPL 2004»
15 years 2 months ago
Power-Driven Design Partitioning
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
Rajarshi Mukherjee, Seda Ogrenci Memik
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 1 months ago
Multi-objective design strategy for high-level low power design of DSP systems
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
Mark S. Bright, Tughrul Arslan
DFT
1999
IEEE
131views VLSI» more  DFT 1999»
15 years 1 months ago
Optimal Vector Selection for Low Power BIST
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaud...
PATMOS
2004
Springer
15 years 2 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan