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DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 4 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
MSE
2005
IEEE
148views Hardware» more  MSE 2005»
15 years 3 months ago
Teaching System-Level Design Using SpecC and SystemC
System-level design of embedded computer systems is essential to manage complexity and enhance designer productivity. Viewing designs at t abstraction levels allows developers to ...
Robert D. Walstrom, Joseph Schneider, Diane T. Rov...
EMSOFT
2004
Springer
15 years 3 months ago
Practical PACE for embedded systems
In current embedded systems, one of the major concerns is energy conservation. The dynamic voltage-scheduling (DVS) framework, which involves dynamically adjusting the voltage and...
Ruibin Xu, Chenhai Xi, Rami G. Melhem, Daniel Moss...
IESS
2007
Springer
143views Hardware» more  IESS 2007»
15 years 3 months ago
Embedded Software Development in a System-Level Design Flow
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlaue...
RTCSA
2008
IEEE
15 years 4 months ago
Concepts of Switching in the Time-Triggered Network-on-Chip
This paper presents the concepts of switching in the Time-Triggered Network-on-Chip (TTNoC), which is the communication subsystem of the Time-Triggered Systemon-Chip (TTSoC) archi...
Christian Paukovits, Hermann Kopetz