Sciweavers

1549 search results - page 132 / 310
» Embedded Application Design Using a Real-Time OS
Sort
View
FPL
2010
Springer
131views Hardware» more  FPL 2010»
15 years 13 days ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý
ASPLOS
2010
ACM
15 years 5 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
MMSEC
2006
ACM
195views Multimedia» more  MMSEC 2006»
15 years 8 months ago
Image annotation watermarking: nested object embedding using hypergraph model
In this paper, we introduce to the special domain of image annotation watermarking, based on embedding of hierarchical data related to objects into user-selected areas on an image...
Claus Vielhauer, Maik Schott
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 7 months ago
SoC design integration by using automatic interconnection rectification
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
RTCSA
2009
IEEE
15 years 9 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard