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DSRT
2008
IEEE
15 years 3 months ago
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
Most common real-time embedded programming languages provide a means to specify functionality; however, they have few constructs to specify precise timing constraints. LabVIEW is ...
Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee...
138
Voted
WWW
2004
ACM
16 years 2 months ago
A possible simplification of the semantic web architecture
In the semantic web architecture, Web ontology languages are built on top of RDF(S). However, serious difficulties have arisen when trying to layer expressive ontology languages, ...
Bernardo Cuenca Grau
ATAL
2006
Springer
15 years 5 months ago
Designing agent chips
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized int...
Insu Song, Guido Governatori
111
Voted
DELTA
2010
IEEE
15 years 7 months ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
15 years 7 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...