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FPGA
2004
ACM
15 years 7 months ago
2004
ACM
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
ISCA
1999
IEEE
15 years 6 months ago
1999
IEEE
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
106
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ASAP
2004
IEEE
15 years 5 months ago
2004
IEEE
We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
DAC
1999
ACM
16 years 2 months ago
1999
ACM
In this paper we present a new algorithm for computing reduced-order models of interconnect which utilizes the dominant controllable subspace of the system. The dominant controlla...
118
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DAC
2009
ACM
15 years 5 months ago
2009
ACM
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...