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88
Voted
DAC
2001
ACM
15 years 11 months ago
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
Kaustav Banerjee, Amit Mehrotra
65
Voted
SCOPES
2004
Springer
15 years 3 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys
62
Voted
TEI
2009
ACM
98views Hardware» more  TEI 2009»
15 years 5 months ago
Shutters: a permeable surface for environmental control and communication
Surfaces capable of modulating permeability have long been used in architecture for environmental control, but have remained largely unexplored as information displays. The advent...
Marcelo Coelho, Pattie Maes
TPDS
2010
98views more  TPDS 2010»
14 years 8 months ago
The Synchronization Power of Coalesced Memory Accesses
—Multicore architectures have established themselves as the new generation of computer architectures. As part of the one core to many cores evolution, memory access mechanisms ha...
Phuong Hoai Ha, Philippas Tsigas, Otto J. Anshus
CL
2010
Springer
14 years 10 months ago
SystemJ: A GALS language for system level design
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
Avinash Malik, Zoran Salcic, Partha S. Roop, Alain...