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IJES
2007
79views more  IJES 2007»
14 years 10 months ago
Energy-aware compilation and hardware design for VLIW embedded systems
Abstract: Tomorrow’s embedded devices need to run high-resolution multimedia applications which need an enormous computational complexity with a very low energy consumption const...
José L. Ayala, Marisa López-Vallejo,...
CODES
2010
IEEE
14 years 8 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
DAC
2012
ACM
13 years 13 days ago
Chisel: constructing hardware in a Scala embedded language
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific h...
Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup ...
DAC
2005
ACM
14 years 12 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
DAC
2006
ACM
15 years 11 months ago
A new hybrid FPGA with nanoscale clusters and CMOS routing
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
Reza M. Rad, Mohammad Tehranipoor