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ICDCS
2002
IEEE
15 years 3 months ago
ControlWare: A Middleware Architecture for Feedback Control of Software Performance
Attainment of software performance assurances in open, largely unpredictable environments has recently become an important focus for real-time research. Unlike closed embedded sys...
Ronghua Zhang, Chenyang Lu, Tarek F. Abdelzaher, J...
HPCN
1998
Springer
15 years 2 months ago
DISCWorld: A Distributed High Performance Computing Environment
An increasing number of science and engineering applications require distributed and parallel computing resources to satisfy user response-time requirements. Distributed science a...
Kenneth A. Hawick, Heath A. James, Craig J. Patten...
CF
2009
ACM
15 years 4 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
EMSOFT
2009
Springer
15 years 4 months ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
ISCA
2003
IEEE
169views Hardware» more  ISCA 2003»
15 years 3 months ago
Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
Aravindh Anantaraman, Kiran Seth, Kaustubh Patil, ...