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ISCA
2003
IEEE
93views Hardware» more  ISCA 2003»
15 years 8 months ago
Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors
This work examines dynamic cluster assignment for a clustered trace cache processor (CTCP). Previously proposed cluster assignment techniques run into unique problems as issue wid...
Ravi Bhargava, Lizy Kurian John
ISCA
2003
IEEE
107views Hardware» more  ISCA 2003»
15 years 8 months ago
Positional Adaptation of Processors: Application to Energy Reduction
Although adaptive processors can exploit application variability to improve performance or save energy, effectively managing their adaptivity is challenging. To address this probl...
Michael C. Huang, Jose Renau, Josep Torrellas
113
Voted
DAC
2005
ACM
15 years 4 months ago
Smart diagnostics for configurable processor verification
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
Sadik Ezer, Scott Johnson
94
Voted
FPL
2008
Springer
119views Hardware» more  FPL 2008»
15 years 4 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...
136
Voted
JUCS
2010
124views more  JUCS 2010»
15 years 1 months ago
Performance Optimizations for DAA Signatures on Java enabled Platforms
: With the spreading of embedded and mobile devices, public-key cryptography has become an important feature for securing communication and protecting personal data. However, the c...
Kurt Dietrich, Franz Röck