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ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
15 years 10 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
157
Voted
RTAS
2005
IEEE
15 years 10 months ago
Energy-Aware Task Allocation for Rate Monotonic Scheduling
We consider the problem of energy minimization for periodic preemptive hard real-time tasks that are scheduled on an identical multiprocessor platform with dynamic voltage scaling...
Tarek A. AlEnawy, Hakan Aydin
RTCSA
2005
IEEE
15 years 10 months ago
Fine-Grained Task Reweighting on Multiprocessors
We consider the problem of task reweighting in fair-scheduled multiprocessor systems wherein each task’s processor share is specified as a weight. When a task is reweighted, a ...
Aaron Block, James H. Anderson, Gary Bishop
RTSS
2005
IEEE
15 years 10 months ago
Enhancing the Robustness of Distributed Real-Time Middleware via End-to-End Utilization Control
A key challenge for distributed real-time and embedded (DRE) middleware is maintaining both system reliability and desired real-time performance in unpredictable environments wher...
Xiaorui Wang, Chenyang Lu, Xenofon D. Koutsoukos
139
Voted
SAMOS
2005
Springer
15 years 10 months ago
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Chi...
Holger Blume, Thorsten von Sydow, Daniel Becker, T...