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128
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CHES
2008
Springer
132views Cryptology» more  CHES 2008»
15 years 7 months ago
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
Philipp Grabher, Johann Großschädl, Dan...
CODES
2008
IEEE
15 years 6 months ago
Software optimization for MPSoC: a mpeg-2 decoder case study
Using traditional software profiling to optimize embedded software in an MPSoC design is not reliable. With multiple processors running concurrently and programs interacting, trad...
Eric Cheung, Harry Hsieh, Felice Balarin
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
15 years 5 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
134
Voted
IEEEHPCS
2010
15 years 3 months ago
Retargeting PLAPACK to clusters with hardware accelerators
Hardware accelerators are becoming a highly appealing approach to boost the raw performance as well as the price-performance and power-performance ratios of current clusters. In t...
Manuel Fogue, Francisco D. Igual, Enrique S. Quint...
EMSOFT
2010
Springer
15 years 3 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran