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ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
16 years 1 months ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu
ICCAD
2001
IEEE
126views Hardware» more  ICCAD 2001»
16 years 1 months ago
Constraint Satisfaction for Relative Location Assignment and Scheduling
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...
TEI
2010
ACM
158views Hardware» more  TEI 2010»
15 years 11 months ago
ChainMail: a configurable multimodal lining to enable sensate surfaces and interactive objects
The ChainMail system is a scalable electronic sensate skin that is designed as a dense sensor network. ChainMail is built from small (1”x1”) rigid circuit boards attached to t...
Behram F. T. Mistree, Joseph A. Paradiso
CISIS
2009
IEEE
15 years 11 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
DATE
2009
IEEE
140views Hardware» more  DATE 2009»
15 years 11 months ago
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms
With the relentless scaling of semiconductor technology, the lifetime reliability of embedded multiprocessor platforms has become one of the major concerns for the industry. If th...
Lin Huang, Feng Yuan, Qiang Xu