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CASES
2009
ACM
15 years 11 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
DATE
2008
IEEE
62views Hardware» more  DATE 2008»
15 years 11 months ago
Instruction Cache Energy Saving Through Compiler Way-Placement
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
Timothy M. Jones, Sandro Bartolini, Bruno De Bus, ...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 11 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Matthew French, Erik Anderson, Dong-In Kang
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
15 years 11 months ago
System Level Design Space Exploration for Multiprocessor System on Chip
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
Issam Maalej, Guy Gogniat, Jean Luc Philippe, Moha...
MOMPES
2008
IEEE
15 years 11 months ago
Architectural Concurrency Equivalence with Chaotic Models
During its lifetime, embedded systems go through multiple changes to their runtime architecture. That is, threads, processes, and processor are added or removed to/from the softwa...
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