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CASES
2008
ACM
14 years 11 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
14 years 7 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
SAC
2008
ACM
14 years 9 months ago
A hybrid software-based self-testing methodology for embedded processor
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
CCGRID
2008
IEEE
15 years 4 months ago
A Performance Study of Secure Data Mining on the Cell Processor
— This paper examines the potential of the Cell processor as a platform for secure data mining on the future volunteer computing systems. Volunteer computing platforms have the p...
Hong Wang 0006, Hiroyuki Takizawa, Hiroaki Kobayas...
ICCD
2003
IEEE
107views Hardware» more  ICCD 2003»
15 years 6 months ago
Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
Sudeep Pasricha, Alexander V. Veidenbaum