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ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 1 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
CASES
2000
ACM
15 years 2 months ago
PROMPT: a mapping environment for telecom applications on "system-on-a-chip"
Increasing of computation needs and improving of processor integration make the mapping of embedded real-time applications more and more expensive. PROMPT [1] provides a new appro...
Michel Barreteau, Juliette Mattioli, Thierry Grand...
HOTOS
2003
IEEE
15 years 3 months ago
Certifying Program Execution with Secure Processors
Cerium is a trusted computing architecture that protects a program’s execution from being tampered while the program is running. Cerium uses a physically tamperresistant CPU and...
Benjie Chen, Robert Morris
JAVA
1999
Springer
15 years 2 months ago
The Operational Semantics of a Java Secure Processor
Pieter H. Hartel, Michael J. Butler, Moshe Levy