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JEC
2006
88views more  JEC 2006»
14 years 9 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
SOCIALCOM
2010
14 years 7 months ago
Secure Wireless Embedded Systems Via Component-based Design
This paper introduces the method secure-by-design as a way of constructing wireless embedded systems using component-based modeling frameworks. This facilitates design of secure a...
Theis Hjorth, Rune Torbensen
FOCS
2006
IEEE
15 years 3 months ago
Towards Secure and Scalable Computation in Peer-to-Peer Networks
We consider the problems of Byzantine Agreement and Leader Election, where a constant fraction b < 1/3 of processors are controlled by a malicious adversary. The first problem...
Valerie King, Jared Saia, Vishal Sanwalani, Erik V...
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
15 years 2 months ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...
VLSISP
2008
123views more  VLSISP 2008»
14 years 9 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...