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DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 8 months ago
Automating processor customisation: optimised memory access and resource sharing
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
Robert G. Dimond, Oskar Mencer, Wayne Luk
ISSS
2002
IEEE
136views Hardware» more  ISSS 2002»
15 years 7 months ago
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu
JCP
2008
216views more  JCP 2008»
15 years 2 months ago
Design Overview Of Processor Based Implantable Pacemaker
Implantable pacemaker is a battery operated real time embedded system, which includes software/hardware codesign strategy. As it is placed within the heart by surgery, battery life...
Santosh D. Chede, Kishore D. Kulat
109
Voted
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
15 years 9 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
116
Voted
IPPS
2006
IEEE
15 years 8 months ago
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...