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CASES
2008
ACM
15 years 5 months ago
Cache-aware cross-profiling for java processors
Performance evaluation of embedded software is essential in an early development phase so as to ensure that the software will run on the embedded device's limited computing r...
Walter Binder, Alex Villazón, Martin Schoeb...
CORR
2007
Springer
132views Education» more  CORR 2007»
15 years 3 months ago
Nodally 3-connected planar graphs and convex combination mappings
A barycentric mapping of a planar graph is a plane embedding in which every internal vertex is the average of its neighbours. A celebrated result of Tutte’s [16] is that if a pl...
Colm Ó'Dúnlaing
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 3 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
SIAMJO
2008
84views more  SIAMJO 2008»
15 years 3 months ago
Regularity Conditions via Quasi-Relative Interior in Convex Programming
We give some new regularity conditions for Fenchel duality in separated locally convex vector spaces, written in terms of the notion of quasi interior and quasi-relative interior, ...
Radu Ioan Bot, Ernö Robert Csetnek, Gert Wank...
PPL
2002
108views more  PPL 2002»
15 years 2 months ago
An Efficient Implementation of the BSP Programming Library for VIA
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...
Yang-Suk Kee, Soonhoi Ha