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DM
2006
128views more  DM 2006»
15 years 3 months ago
Non-trivial t-designs without repeated blocks exist for all t
A computer package is being developed at Bayreuth for the generation and investigation of discrete structures. The package is a C and C++ class library of powerful algorithms endow...
Luc Teirlinck
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 1 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
JCO
2011
115views more  JCO 2011»
14 years 10 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
PARA
2000
Springer
15 years 7 months ago
JavaGrande - High Performance Computing with Java
The JavaGrande Forum is a group of users, researchers, and interested parties from industry. The Forum members are either trying to use Java for resource-intensive applications or ...
Michael Philippsen, Ronald F. Boisvert, Vladimir G...
DAC
2007
ACM
16 years 4 months ago
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution
It is now common for multimedia applications to be partitioned and mapped onto multiple processing elements of a system-on-chip architecture. An important design constraint in suc...
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi,...