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159
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DAC
2005
ACM
16 years 7 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
172
Voted
RTAS
2006
IEEE
16 years 5 days ago
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
Jae W. Lee, Krste Asanovic
WORDS
2003
IEEE
15 years 11 months ago
Asynchrony and Real-Time Dependable Computing
We examine how computer system problems can be derived from real application problems, with a particular focus on the relevance of some assumptions, especially those related to co...
Gérard Le Lann
EMSOFT
2010
Springer
15 years 4 months ago
Resource adaptations with servers for hard real-time systems
Many real-time applications are designed to work in different operating modes each characterized by different functionality and resource demands. With each mode change, resource d...
Nikolay Stoimenov, Lothar Thiele, Luca Santinelli,...
171
Voted
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
15 years 3 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...