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ECRTS
2010
IEEE
15 years 6 months ago
Deadline Assignment and Tardiness Control for Real-Time Data Services
It is challenging to support the timeliness of realtime data service requests in data-intensive real-time applications such as online auction or stock trading, while maintaining t...
Yan Zhou, Kyoung-Don Kang
EMSOFT
2006
Springer
15 years 9 months ago
New approach to architectural synthesis: incorporating QoS constraint
Embedded applications like video decoding, video streaming and those in the network domain, typically have a Quality of Service (QoS) requirement which needs to be met. Apart from...
Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan
DAC
2010
ACM
15 years 5 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
FPL
2008
Springer
119views Hardware» more  FPL 2008»
15 years 7 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
15 years 12 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni