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GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 8 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
PACS
2000
Springer
83views Hardware» more  PACS 2000»
15 years 8 months ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald
ACMDIS
2006
ACM
15 years 10 months ago
Morphome: a constructive field study of proactive information technology in the home
This paper presents the main results of a three-year long field and design study of proactive information technology in the home. This technology uses sensors to track human activ...
Ilpo Koskinen, Kristo Kuusela, Katja Battarbee, An...
MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
15 years 8 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
CODES
2004
IEEE
15 years 8 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel