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ICANN
2005
Springer
15 years 10 months ago
A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor
Abstract. A real-time, large scale, leaky-integrate-and-fire neural network processor realized using FPGA is presented. This has been designed, as part of a collaborative project,...
Martin J. Pearson, Ian Gilhespy, Kevin N. Gurney, ...
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
15 years 8 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...
DAC
2008
ACM
16 years 5 months ago
Cache modeling in probabilistic execution time analysis
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
Yun Liang, Tulika Mitra
ICUMT
2009
15 years 2 months ago
Simulation analysis of Bluetooth Piconets self-disturbance in industrial applications: A case study
- Wireless systems operating in the 2.4 GHz ISM frequency band and sharing the same environment in an industrial environment are likely to interfere with each other due to simultan...
Muhammad Kamran Khan, Ahmad Ali Tabassam, Farhan A...
IPSN
2005
Springer
15 years 10 months ago
eBlocks - an enabling technology for basic sensor based systems
—We describe the development of a set of embedded system building blocks, known as eBlocks. An eBlock network can be viewed as a basic form of sensor network that can be develope...
Susan Cotterell, Ryan Mannion, Frank Vahid, Harry ...