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» Embedded System Design for Network Time Synchronization
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FLAIRS
2007
15 years 6 months ago
Adaptation of Hierarchical Task Network Plans
This paper presents RepairSHOP a system capable of performing plan adaptation and plan repair. RepairSHOP is built on top of the HTN planner SHOP. RepairSHOP has three properties....
Ian Warfield, Chad Hogg, Stephen Lee-Urban, Hector...
129
Voted
ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
16 years 18 days ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu
121
Voted
DATE
2006
IEEE
78views Hardware» more  DATE 2006»
15 years 7 months ago
A time-triggered ethernet (TTE) switch
This paper presents the design of a Time-Triggered Ethernet (TTE) Switch, which is one of the core units of the Time-Triggered Ethernet system. Time-triggered Ethernet is a commun...
Klaus Steinhammer, Petr Grillinger, Astrit Ademaj,...
110
Voted
DAC
2009
ACM
16 years 4 months ago
A direct integral-equation solver of linear complexity for large-scale 3D capacitance and impedance extraction
State-of-the-art integral-equation-based solvers rely on techniques that can perform a matrix-vector multiplication in O(N) complexity. In this work, a fast inverse of linear comp...
Wenwen Chai, Dan Jiao, Cheng-Kok Koh
116
Voted
VLSID
2009
IEEE
96views VLSI» more  VLSID 2009»
16 years 4 months ago
Efficient Placement of Compressed Code for Parallel Decompression
Code compression is important in embedded systems design since it reduces the code size (memory requirement) and thereby improves overall area, power and performance. Existing res...
Xiaoke Qin, Prabhat Mishra