3134 search results - page 83 / 627 » Embedded System Design for Network Time Synchronization |
152
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ICANN
2005
Springer
15 years 8 months ago
2005
Springer
Abstract. One focus of recent research in the field of biologically plausible neural networks is the investigation of higher-level functions such as learning, development and modu...
128
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DAC
2005
ACM
16 years 4 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
125
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ECRTS
2000
IEEE
15 years 7 months ago
2000
IEEE
Internal clock synchronization has been investigated, or employed, for quite a number of years, under the requirement of good upper bounds for the deviation, or accuracy, between ...
105
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FPGA
2010
ACM
15 years 9 months ago
2010
ACM
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
122
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ICCD
1992
IEEE
15 years 7 months ago
1992
IEEE
Asynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in ...