With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya,...
Control design and real-time implementation are usually performed in isolation. The effects of the computer implementation on control system performance are still evaluated on the...
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
This paper gives a semantics for discrete-event (DE) models that generalizes that of synchronous/reactive (SR) languages, and a continuous-time (CT) semantics that generalizes the...