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HIPEAC
2010
Springer
15 years 7 months ago
2010
Springer
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
SIES
2007
IEEE
15 years 4 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
CSL
2002
Springer
14 years 9 months ago
2002
Springer
In the process of interactive theorem proving one often works with incomplete higher order proofs. In this paper we address the problem of giving a correctness criterion for these ...
ECRTS
2008
IEEE
15 years 4 months ago
2008
IEEE
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...
SEUS
2005
IEEE
15 years 3 months ago
2005
IEEE
Nomadic computing environments are composed of heterogeneous mobile computing domains. Unfortunately, the service discovery platforms suitable for each domain are scarcely interop...