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CC
2003
Springer
192views System Software» more  CC 2003»
15 years 9 months ago
Address Register Assignment for Reducing Code Size
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, ...
CODES
2008
IEEE
15 years 10 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
171
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APCSAC
2001
IEEE
15 years 7 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
APIN
2006
136views more  APIN 2006»
15 years 4 months ago
Cell modeling with reusable agent-based formalisms
Biologists are building increasingly complex models and simulations of cells and other biological entities, and are looking at alternatives to traditional representations. Making ...
Ken Webb, Tony White
KES
2008
Springer
15 years 4 months ago
Reinforcing fuzzy rule-based diagnosis of turbomachines with case-based reasoning
This paper presents an integrated knowledge-based system, which combines fuzzy rule-based reasoning with case-based reasoning, for turbomachinery diagnosis. By incorporating a case...
Meijun Yang, Qiang Shen