Sciweavers

1715 search results - page 245 / 343
» Embedded Systems and Real-Time Programming
Sort
View
VLSID
1999
IEEE
99views VLSI» more  VLSID 1999»
15 years 9 months ago
Array Index Allocation under Register Constraints in DSP Programs
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
Anupam Basu, Rainer Leupers, Peter Marwedel
EPIA
2003
Springer
15 years 10 months ago
jcc: Integrating Timed Default Concurrent Constraint Programming into Java
Abstract. This paper describes jcc, an integration of the timed default concurrent constraint programming framework [16] (Timed Default cc) into JAVA [7]. jcc is intended for use i...
Vijay A. Saraswat, Radha Jagadeesan, Vineet Gupta
EMSOFT
2007
Springer
15 years 11 months ago
WCET estimation for executables in the presence of data caches
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Rathijit Sen, Y. N. Srikant
142
Voted
CASES
2006
ACM
15 years 11 months ago
A dynamic binary instrumentation engine for the ARM architecture
Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software. While numerous DBI frameworks have been developed for general-purpose ...
Kim M. Hazelwood, Artur Klauser
RTAS
2008
IEEE
15 years 11 months ago
Bounding Worst-Case Response Time for Tasks with Non-Preemptive Regions
Real-time schedulability theory requires a priori knowledge of the worst-case execution time (WCET) of every task in the system. Fundamental to the calculation of WCET is a schedu...
Harini Ramaprasad, Frank Mueller