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ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 2 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
JCP
2008
97views more  JCP 2008»
14 years 9 months ago
Profiling Tools for FPGA-Based Embedded Systems: Survey and Quantitative Comparison
Profiling tools are computer-aided design (CAD) tools that help in determining the computationally intensive portions in software. Embedded systems consist of hardware and software...
Jason G. Tong, Mohammed A. S. Khalid
ISOLA
2010
Springer
14 years 7 months ago
Model-Driven Design-Space Exploration for Embedded Systems: The Octopus Toolset
Abstract. The complexity of today's embedded systems and their development trajectories requires a systematic, model-driven design approach, supported by tooling wherever poss...
Twan Basten, Emiel van Benthum, Marc Geilen, Marti...
ISVLSI
2003
IEEE
101views VLSI» more  ISVLSI 2003»
15 years 3 months ago
Energy Benefits of a Configurable Line Size Cache for Embedded Systems
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
Chuanjun Zhang, Frank Vahid, Walid A. Najjar
RTCSA
2005
IEEE
15 years 3 months ago
Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
We present an approach to the analysis and optimization of heterogeneous distributed embedded systems for hard real-time applications. The systems are heterogeneous not only in te...
Traian Pop, Paul Pop, Petru Eles, Zebo Peng