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TCAD
2010
90views more  TCAD 2010»
14 years 10 months ago
Fast, Nearly Optimal ISE Identification With I/O Serialization Through Maximal Clique Enumeration
The last decade has witnessed the emergence of the application-specific instruction-set processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
TII
2010
146views Education» more  TII 2010»
14 years 10 months ago
A Flexible Design Flow for Software IP Binding in FPGA
Software intellectual property (SWIP) is a critical component of increasingly complex field programmable gate arrays (FPGA)-based system-on-chip (SOC) designs. As a result, develop...
Michael A. Gora, Abhranil Maiti, Patrick Schaumont
267
Voted
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
14 years 7 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
BIRTHDAY
2012
Springer
13 years 11 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...
148
Voted
EWSN
2012
Springer
13 years 11 months ago
Low Power or High Performance? A Tradeoff Whose Time Has Come (and Nearly Gone)
Abstract. Some have argued that the dichotomy between high-performance operation and low resource utilization is false – an artifact that will soon succumb to Moore’s Law and c...
JeongGil Ko, Kevin Klues, Christian Richter, Wanja...