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» Embedded system synthesis under memory constraints
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DAC
1998
ACM
15 years 1 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
TIME
2005
IEEE
15 years 3 months ago
LOLA: Runtime Monitoring of Synchronous Systems
Abstract— We present a specification language and algorithms for the online and offline monitoring of synchronous systems including circuits and embedded systems. Such monitori...
Ben D'Angelo, Sriram Sankaranarayanan, Césa...
RTCSA
2005
IEEE
15 years 3 months ago
Scheduling Real-Time Information in a Broadcast System with Non-Real-Time Information
Data broadcast is an efficient information delivery model that can deliver information to a large population simultaneously. In this paper, we propose two efficient algorithms to ...
Hsin-Wen Wei, Pei-Chi Huang, Hsung-Pin Chang, Wei ...
DATE
2006
IEEE
77views Hardware» more  DATE 2006»
15 years 3 months ago
Soft-error classification and impact analysis on real-time operating systems
This paper investigates the sensitivity of real-time systems running applications under operating systems that are subject to soft-errors. We consider applications using different...
N. Ignat, B. Nicolescu, Yvon Savaria, Gabriela Nic...
73
Voted
DAC
2003
ACM
15 years 10 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid