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» Embedded system synthesis under memory constraints
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DAC
2010
ACM
14 years 10 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
DATE
2003
IEEE
186views Hardware» more  DATE 2003»
15 years 3 months ago
Formal Methods for Integration of Automotive Software
Novel functionality, configurability and higher efficiency in automotive systems require sophisticated embedded software, as well as distributed software development between man...
Marek Jersak, Kai Richter, Rolf Ernst, Jörn-C...
SENSYS
2006
ACM
15 years 3 months ago
Capsule: an energy-optimized object storage system for memory-constrained sensor devices
Recent gains in energy-efficiency of new-generation NAND flash storage have strengthened the case for in-network storage by data-centric sensor network applications. This paper ...
Gaurav Mathur, Peter Desnoyers, Deepak Ganesan, Pr...
ICCAD
2008
IEEE
89views Hardware» more  ICCAD 2008»
15 years 6 months ago
Temperature aware task sequencing and voltage scaling
Abstract—On-chip power density and temperature are rising exponentially with decreasing feature sizes. This alarming trend calls for temperature management at every level of syst...
Ramkumar Jayaseelan, Tulika Mitra
INTEGRATION
1998
96views more  INTEGRATION 1998»
14 years 9 months ago
BIST for systems-on-a-chip
An increasing part of microelectronic systems is implemented on the basis of predesigned and preverified modules, so-called cores, which are reused in many instances. Core-provide...
Hans-Joachim Wunderlich