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» Embedded system synthesis under memory constraints
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ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
15 years 1 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura
IPPS
2010
IEEE
14 years 7 months ago
Analysis of durability in replicated distributed storage systems
In this paper, we investigate the roles of replication vs. repair to achieve durability in large-scale distributed storage systems. Specifically, we address the fundamental questio...
Sriram Ramabhadran, Joseph Pasquale
JCP
2008
118views more  JCP 2008»
14 years 9 months ago
Power-efficient Instruction Encoding Optimization for Various Architecture Classes
A huge application domain, in particular, wireless and handheld devices strongly requires flexible and powerefficient hardware with high performance. This can only be achieved with...
Diandian Zhang, Anupam Chattopadhyay, David Kammle...
MOMPES
2006
IEEE
15 years 3 months ago
Model-Driven Development of Real-Time Systems with UML 2.0 and C
In this era of intense liking to automation in almost all time-critical fields, real-time systems have got widespread utilization in industrial, commercial, medical, space and mil...
Mohammad Ullah Khan, Kurt Geihs, Felix Gutbrodt, P...
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
15 years 1 months ago
Utilizing custom registers in application-specific instruction set processors for register spills elimination
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
Hai Lin, Yunsi Fei