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» Embedded system synthesis under memory constraints
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DFT
2003
IEEE
64views VLSI» more  DFT 2003»
15 years 3 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
CASES
2009
ACM
15 years 4 months ago
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on...
Jinho Seol, Hyotaek Shim, Jaegeuk Kim, Seungryoul ...
IUI
2012
ACM
13 years 5 months ago
Mobile texting: can post-ASR correction solve the issues? an experimental study on gain vs. costs
The next big step in embedded, mobile speech recognition will be to allow completely free input as it is needed for messaging like SMS or email. However, unconstrained dictation r...
Michael Feld, Saeedeh Momtazi, Farina Freigang, Di...
ECRTS
2010
IEEE
14 years 10 months ago
Improved Tardiness Bounds for Global EDF
The Earliest Deadline First scheduling algorithm (EDF) is known to not be optimal under global scheduling on multiprocessor platforms. Results have been obtained that bound the ma...
Jeremy P. Erickson, UmaMaheswari Devi, Sanjoy K. B...
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CODES
2006
IEEE
15 years 3 months ago
Bounded arbitration algorithm for QoS-supported on-chip communication
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
Mohammad Abdullah Al Faruque, Gereon Weiss, Jö...