506 search results - page 18 / 102 » Emerging power management tools for processor design |
TVLSI
2008
14 years 9 months ago
2008
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...
59
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DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract—Future microprocessors increasingly rely on an unreliable CMOS fabric due to aggressive scaling of voltage and frequency, and shrinking design margins. Fortunately, many...
101
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ACMMSP
2006
ACM
15 years 3 months ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
ASAP
2007
IEEE
14 years 11 months ago
2007
IEEE
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...