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» Emerging power management tools for processor design
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ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 2 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ICS
2009
Tsinghua U.
15 years 2 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
MICRO
2006
IEEE
102views Hardware» more  MICRO 2006»
15 years 3 months ago
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multi...
Sangyeun Cho, Lei Jin
89
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SIGMOD
2011
ACM
218views Database» more  SIGMOD 2011»
14 years 15 days ago
A data-oriented transaction execution engine and supporting tools
Conventional OLTP systems assign each transaction to a worker thread and that thread accesses data, depending on what the transaction dictates. This thread-to-transaction work ass...
Ippokratis Pandis, Pinar Tözün, Miguel B...
JCP
2007
154views more  JCP 2007»
14 years 9 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras