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» Emerging power management tools for processor design
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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 2 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
SE
2008
14 years 11 months ago
TIME - Tracking Intra- and Inter-Model Evolution
Abstract: Modern software development approaches, especially the model-driven approaches, heavily rely on the use of models during the whole development process. With the increasin...
Maximilian Kögel
ICDAR
2007
IEEE
15 years 4 months ago
iGesture: A General Gesture Recognition Framework
With the emergence of digital pen and paper interfaces, there is a need for gesture recognition tools for digital pen input. While there exists a variety of gesture recognition fr...
Beat Signer, U. Kurmann, Moira C. Norrie
PDP
2011
IEEE
14 years 1 months ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...
IISWC
2009
IEEE
15 years 4 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee