Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...
We present a series of experiments concerned with the inspection of regular, engineered structures carried out using swarms of five to twenty autonomous, miniature robots, solely ...
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
Rendering large trimmed NURBS models with high quality at interactive frame rates is of great interest for industry, since nearly all their models are designed on the basis of thi...
Abstract. Problems in simultaneous graph drawing involve the layout of several graphs on a shared vertex set. This paper describes a Graph Simultaneous Embedding Tool, GraphSET, de...
Alejandro Estrella-Balderrama, J. Joseph Fowler, S...