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» Employing Simulation to Evaluate Designs: The APEX Approach
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ASPLOS
2004
ACM
15 years 5 months ago
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
Multiple Clock Domain (MCD) processors are a promising future alternative to today’s fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor ...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
LISA
2008
15 years 2 months ago
Portable Desktop Applications Based on P2P Transportation and Virtualization
Play-on-demand is usually regarded as a feasible access mode for web content (including streaming video, web pages and so on), web services and some Software-As-A-Service (SaaS) a...
Youhui Zhang, Xiaoling Wang, Liang Hong
DATE
2009
IEEE
114views Hardware» more  DATE 2009»
15 years 6 months ago
Hardware aging-based software metering
Abstract—Reliable and verifiable hardware, software and content usage metering (HSCM) are of primary importance for wide segments of e-commerce including intellectual property a...
Foad Dabiri, Miodrag Potkonjak
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 5 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
CL
2008
Springer
14 years 12 months ago
Efficient exception handling in Java bytecode-to-C ahead-of-time compiler for embedded systems
One of the most promising approaches to Java acceleration in embedded systems is a bytecode-to-C ahead-of-time compiler (AOTC). It improves the performance of a Java virtual machi...
Dong-Heon Jung, Jong Kuk Park, Sung-Hwan Bae, Jaem...