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» Enabling Automatic Module Generation for FCCM Compilers
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DAC
2003
ACM
15 years 11 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
DASIP
2010
14 years 5 months ago
RVC: A multi-decoder CAL Composer tool
The Reconfigurable Video Coding (RVC) framework is a recent ISO standard aiming at providing a unified specification of MPEG video technology in the form of a library of component...
Francesca Palumbo, Danilo Pani, Emanuele Manca, Lu...
ASPLOS
2008
ACM
15 years 2 days ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
CHI
2004
ACM
15 years 10 months ago
Predictive human performance modeling made easy
Although engineering models of user behavior have enjoyed a rich history in HCI, they have yet to have a widespread impact due to the complexities of the modeling process. In this...
Bonnie E. John, Konstantine C. Prevas, Dario D. Sa...
PPOPP
2009
ACM
15 years 10 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...